Polycrystalline silicon (polysilicon) has long been used for gates and interconnecting conductor lines for metal oxide semiconductor (MOS) integrated circuits. However, one disadvantage of polysilicon is its relatively high electrical resistance, on the order of 20 to 30 ohms per square for a typical film of about 5000 Angstroms thickness. This high electrical resistance introduces RC time delays, particularly when the polysilicon lines are long. While this problem is not particularly acute for large scale integrated (LSI) MOS circuits, as regards to very large scale integrated (VLSI) circuits, the relatively high resistivity of polycrystalline silicon substantially limits circuit performance.
One alternative is to replace the polysilicon with a refractory metal silicide such as molybdenum silicide, tungsten silicide, tantalum silicide, titanium silicide and mixtures thereof. The silicides have processing properties similar to polysilicon with the added advantage of an order-of-magnitude lower sheet resistance. However, some silicide-gate designs have stability problems. If a silicide material is placed directly over the gate oxide, high temperature processing can cause the metal to diffuse through the gate and degrade the device performance via gate oxide breakdown.
An optional modification of this alternative that potentially avoids the metal diffusion problem is the use of a gate sandwich structure consisting of polysilicon on the bottom and a metal silicide on the top with only the polysilicon contacting the gate oxide. This polysilicon-silicide structure is commonly called a polycide. This approach offers the advantage of lower sheet resistance on the order of 1 to 5 ohms per square and is attractive from a process standpoint since it is more easily inserted into an existing process line. Because of these advantageous features, this approach has been gaining wide-spread popularity.
A number of polycide structures have been reported in the prior art. These include silicides of almost all the transition metals, and chromium, nickel and iron formed on polysilicon. Of these, a tungsten polycide structure consisting of tungsten disilicide (WSi.sub.2) on top of a doped polysilicon layer has been the subject of intensive investigation not only because of its low resistivity but also because of its stable chemical processing properties and compatibility as a gate material (i.e. MOS devices fabricated with WSi.sub.2 /polysilicon gate material exhibit excellent silicon dioxide-silicon inter-face properties such as low surface state density, Qss, and low surface state density distribution) while preserving the proven polysilicon gate advantages.
However, the use of silicides in VLSI technology causes a number of problems. Specifically, it is difficult to provide a good ohmic contact between a silicide interconnect layer and a silicon substrate. Silicides are dopant sinks and dopant loss from heavily doped areas through silicide films are a well-documented phenomenon, see M. Y. Tsai, et al. J. Appl. Phys., Vol. 52, 1981, p. 5350. Secondly, silicides, especially when deposited by sputtering, do not always provide good step coverage over the vertical features of the integrated circuit. That is, sputtered silicides may be characterized by electrical discontinuities when they are deposited over vertical steps associated with integrated circuit devices. This is especially critical when the silicide is used by itself rather than in combination with a polycrystalline silicn. Finally, it is necessary to avoid any possible reaction between the silicide and the contacting layers or chemicals which will come in contact with the silicide during the manufacturing process.
Metal evaporation and sputtering are well known techniques for depositing metal films. A less common, but more efficient method is chemical vapor deposition (CVD) as described in P. A. Gargini, et al., "WOS: Low Resistance Self-aligned Source, Drain and Gate Transistors," International Electron Devices Meeting Papers December 1981, pp. 54-57. T. Moriya, et al., in "A Planar Metallization Process--Its Application to Tri-level Aluminum Interconnection," International Electron Devices Meeting Papers published December, 1983, pp. 550-553 teaches that contact windows or via holes of a high aspect ratio may be refilled with tungsten by selective CVD employing WF.sub.6. However, tungsten films made in this fashion are subject to encroachment problems during the deposition process. And although the tungsten CVD process is noted as selective in that the tungsten only deposits on the silicon substrate rather than any silicon oxide present, selectivity is completely lost if the reaction temperature rises to about 400.degree. C. or above.
Salicidation processes are also known to give titanium silicide (TiSi.sub.2) films with advantageous properties as described in M. E. Alperin, et al., "Development of the Self-Aligned Titanium Silicide Process for VLSI Applications," IEEE Journal of Solid-State Circuits, Vol. SC-20, No. 1, February 1985, pp. 61-69. The titanium silicide formation process is free from encroachment during processing. However, the particular method noted above requires a titanium and titanium nitride strip and an annealing step after the TiSi.sub.2 film is formed.
U.S. Pat. No. 4,501,769 to Hieber, et al. notes that high melting point silicides, such as tantalum and molybdenum, may be selectively deposited on substrates containing at least some silicon regions by thermally decomposing gaseous silicon, such as SiH.sub.2 Cl.sub.2, and halogen compounds containing the metal in a reaction gas to deposit the metal silicide from the gaseous phase onto a controllably heated substrate containing the silicon regions. The process produces a gaseous hydrogen halide. The method requires adjusting the substrate deposition temperature and composition of the reaction gas to values at which silicide nucleation in regions of the substrate other than silicon regions is suppressed during deposition from the gaseous phase due to the presence of the hydrogen halide.